74LVC125A SMD IC Buffers & Line Drivers Tri-State Quad Bus SO-14

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The 74LVC125A provides four independent buffers with three state outputs. Each output is independently controlled by an associated output enable pin (OE) which places the device in the high impedance state when driven high. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. Features Supply Voltage Range from 1.65V to 5.5V Sinks 24mA at Vcc = 3.3V CMOS low power consumption IOFF Supports Partial-Power-Down Mode Operation Inputs or outputs accept up to 5.5V Inputs can be driven by 3.3V or 5.5V allowing for voltage translation applications. ESD Protection Exceeds JESD 22 ƒ 200-V Machine Model (A115-A) ƒ 2000-V Human Body Model (A114-A) ƒ Exceeds 1000-V Charged Device Model (C101C) Latch-Up Exceeds 250mA per JESD 78, Class II Range of Package Options SO-14 and TSSOP-14 Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3) Applications Voltage Level Shifting General Purpose Logic Power Down Signal Isolation Wide array of products such as: ƒ PCs, networking, notebooks, ultrabooks, netbooks ƒ Computer peripherals, hard drives, CD/DVD ROM ƒ TV, DVD, DVR, set top box Technical Specifications Physical Case/Package SO-14 Contact Plating Tin Mount Surface Mount Number of Pins 14 Technical High Level Output Current -24 mA Logic Function Buffer, Inverting Low Level Output Current 24 mA Max Operating Temperature 125 °C Max Supply Voltage 5.5 V Min Operating Temperature -40 °C Min Supply Voltage 1.65 V Number of Bits per Element 1 Number of Channels 4 Number of Elements 4 Number of Inputs 4 Number of Outputs 4 Polarity Non-Inverting Propagation Delay 15.8 ns Quiescent Current 40 µA 74LVC125A Datasheet